{"id":32465,"date":"2026-01-21T17:02:00","date_gmt":"2026-01-21T17:02:00","guid":{"rendered":"https:\/\/lamarr-institute.org\/publication\/quantum-optimization-for-fpga-placement\/"},"modified":"2026-09-17T11:24:21","modified_gmt":"2026-09-17T11:24:21","slug":"quantum-optimization-for-fpga-placement","status":"publish","type":"publication","link":"https:\/\/lamarr-institute.org\/de\/publication\/quantum-optimization-for-fpga-placement\/","title":{"rendered":"Quantum Optimization for FPGA Placement"},"content":{"rendered":"<p>Field-Programmable Gate Arrays (FPGAs) have become indispensable components in modern computing, providing adaptable and reconfigurable hardware platforms. FPGA-based accelerators offer promising avenues for advancements in diverse fields such as real-time data processing, machine learning, and cryptography. However, optimizing the spatial arrangement of functional blocks on an FPGA, known as placement, presents a challenging task due to its NP-hard nature, necessitating sophisticated algorithms for efficient solutions. Enhancing the placement process directly translates to reduced resource utilization during implementation. Quantum computing (QC) presents a promising approach for tackling such combinatorial problems by exploring vast solution spaces. In this paper, we propose a novel approach to the placement problem, re-formulating it as a series of quadratic unconstrained binary optimization (QUBO) problems, which we then solve using QC. Our novel formulation allows for straightforward integration of design constraints and enables the adaptation of sub-problem sizes to match hardware capabilities. Alongside presenting our method, we also investigate the resilience of contemporary quantum hardware in finding placements for real-world-sized FPGAs. A numerical assessment conducted on a D-Wave Advantage 5.4 quantum annealer indicates that the answer is indeed positive.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Field-Programmable Gate Arrays (FPGAs) have become indispensable components in modern computing, providing adaptable and reconfigurable hardware platforms. FPGA-based accelerators offer promising avenues for advancements in diverse fields such as real-time data processing, machine learning, and cryptography. However, optimizing the spatial arrangement of functional blocks on an FPGA, known as placement, presents a challenging task due to its NP-hard nature, necessitating sophisticated algorithms for efficient solutions. Enhancing the placement process directly [&hellip;]<\/p>\n","protected":false},"author":14,"featured_media":0,"template":"","meta":{"_acf_changed":false,"footnotes":""},"publication-type":[32],"class_list":["post-32465","publication","type-publication","status-publish","hentry","publication-type-inproceedings"],"acf":[],"publishpress_future_workflow_manual_trigger":{"enabledWorkflows":[]},"_links":{"self":[{"href":"https:\/\/lamarr-institute.org\/de\/wp-json\/wp\/v2\/publication\/32465","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/lamarr-institute.org\/de\/wp-json\/wp\/v2\/publication"}],"about":[{"href":"https:\/\/lamarr-institute.org\/de\/wp-json\/wp\/v2\/types\/publication"}],"author":[{"embeddable":true,"href":"https:\/\/lamarr-institute.org\/de\/wp-json\/wp\/v2\/users\/14"}],"version-history":[{"count":0,"href":"https:\/\/lamarr-institute.org\/de\/wp-json\/wp\/v2\/publication\/32465\/revisions"}],"wp:attachment":[{"href":"https:\/\/lamarr-institute.org\/de\/wp-json\/wp\/v2\/media?parent=32465"}],"wp:term":[{"taxonomy":"publication-type","embeddable":true,"href":"https:\/\/lamarr-institute.org\/de\/wp-json\/wp\/v2\/publication-type?post=32465"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}